[all-commits] [llvm/llvm-project] a3fee3: [M68k][CODE_OWNERS](0/8) Add code owner for the M6...

Mon Mar 8 12:33:53 PST 2021

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a3fee3993a0936f7ff462a94e469bb8127c82116
      https://github.com/llvm/llvm-project/commit/a3fee3993a0936f7ff462a94e469bb8127c82116
  Author: Min-Yih Hsu <minyihh at uci.edu>
  Date:   2021-03-08 (Mon, 08 Mar 2021)

  Changed paths:
    M llvm/CODE_OWNERS.TXT

  Log Message:
  -----------
  [M68k][CODE_OWNERS](0/8) Add code owner for the M68k target

Assign yours truely as code owner for the upcoming M68k target

Differential Revision: https://reviews.llvm.org/D95315

  Commit: 503343191e12ccb9dad7e89072cd3e897caf4c2d
      https://github.com/llvm/llvm-project/commit/503343191e12ccb9dad7e89072cd3e897caf4c2d
  Author: Min-Yih Hsu <minyihh at uci.edu>
  Date:   2021-03-08 (Mon, 08 Mar 2021)

  Changed paths:
    M llvm/include/llvm/Target/Target.td
    M llvm/utils/TableGen/CMakeLists.txt
    A llvm/utils/TableGen/CodeBeadsGen.cpp
    M llvm/utils/TableGen/InstrInfoEmitter.cpp
    M llvm/utils/TableGen/TableGen.cpp
    M llvm/utils/TableGen/TableGenBackends.h

  Log Message:
  -----------
  [M68k][TableGen](1/8) TableGen related changes

 - Add a new TableGen backend: CodeBeads
 - Add support to generate logical operand information

For the first item, it is currently a workaround of M68k's (complex)
instruction encoding. A typical architecture, especially CISC one like
X86, normally uses `MCInstrDesc::TSFlags` to carry instruction encoding
info. However, at the early days of M68k backend development, we found
it difficult to fit every possible encoding into the 64-bit
`MCInstrDesc::TSFlags`. Therefore CodeBeads was invented to provide
an alternative, arbitrary length container for instruciton encoding
info. However, in the long term we incline not to use a new TG
backend for less common pattern like what we encountered in M68k. A bug
has been created to host to discussion on migrating from CodeBeads to
more concise solution: https://bugs.llvm.org/show_bug.cgi?id=48792

The second item was also served for similar purpose. It created utility
functions that tell you the index of a `MachineOperand` in a
`MachineInst` given a logical operand index. In normal cases a logical
operand is the same as `MachineOperand`, but for operands using complex
addressing mode a logical operand might be consisting of multiple
`MachineOperand`. The TableGen-ed `getLogicalOperandIdx`, for instance,
can give you the mapping between these two concepts. Nevertheless, we
hope to remove this feature in the future if possible. Since it's not
really useful for the targets supported by LLVM now either.

Authors: myhsu, m4yers, glaubitz

Differential Revision: https://reviews.llvm.org/D88385

  Commit: 6dcc325ce04541a766bef8217d7063ab2063caf0
      https://github.com/llvm/llvm-project/commit/6dcc325ce04541a766bef8217d7063ab2063caf0
  Author: Min-Yih Hsu <minyihh at uci.edu>
  Date:   2021-03-08 (Mon, 08 Mar 2021)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineBasicBlock.h
    M llvm/include/llvm/CodeGen/TargetInstrInfo.h
    M llvm/lib/CodeGen/MachineBasicBlock.cpp
    M llvm/lib/CodeGen/MachineVerifier.cpp

  Log Message:
  -----------
  [M68k][MIR](2/8) Changes in the target-independent MIR part

 - Add new callback in `TargetInstrInfo` --
  `isPCRelRegisterOperandLegal` -- to query whether pc-rel
   register MachineOperand is legal.
 - Add new function to search DebugLoc in a reverse ordering

Authors: myhsu, m4yers, glaubitz

Differential Revision: https://reviews.llvm.org/D88386

  Commit: bec7b166923bbaf0882ff4665224d7a8a7320aa0
      https://github.com/llvm/llvm-project/commit/bec7b166923bbaf0882ff4665224d7a8a7320aa0
  Author: Min-Yih Hsu <minyihh at uci.edu>
  Date:   2021-03-08 (Mon, 08 Mar 2021)

  Changed paths:
    M llvm/cmake/config-ix.cmake
    M llvm/include/llvm/ADT/Triple.h
    M llvm/lib/Support/Triple.cpp
    A llvm/lib/Target/M68k/CMakeLists.txt
    A llvm/lib/Target/M68k/M68k.td
    A llvm/lib/Target/M68k/M68kCallingConv.td
    A llvm/lib/Target/M68k/M68kInstrArithmetic.td
    A llvm/lib/Target/M68k/M68kInstrBits.td
    A llvm/lib/Target/M68k/M68kInstrCompiler.td
    A llvm/lib/Target/M68k/M68kInstrControl.td
    A llvm/lib/Target/M68k/M68kInstrData.td
    A llvm/lib/Target/M68k/M68kInstrFormats.td
    A llvm/lib/Target/M68k/M68kInstrInfo.td
    A llvm/lib/Target/M68k/M68kInstrShiftRotate.td
    A llvm/lib/Target/M68k/M68kRegisterInfo.td
    A llvm/lib/Target/M68k/M68kSchedule.td
    A llvm/lib/Target/M68k/M68kTargetMachine.cpp
    A llvm/lib/Target/M68k/MCTargetDesc/CMakeLists.txt
    A llvm/lib/Target/M68k/MCTargetDesc/M68kMCTargetDesc.cpp
    A llvm/lib/Target/M68k/TargetInfo/CMakeLists.txt
    A llvm/lib/Target/M68k/TargetInfo/M68kTargetInfo.cpp

  Log Message:
  -----------
  [M68k](3/8) Skeleton and target description files

 - Infrastructure for the target (i.e. build files, target triple etc.)
 - All of the target description TableGen file

Authors: myhsu, m4yers, glaubitz

Differential Revision: https://reviews.llvm.org/D88389

  Commit: 8dddc15297f1101f7e312dd0fd9cd57246dbc8bb
      https://github.com/llvm/llvm-project/commit/8dddc15297f1101f7e312dd0fd9cd57246dbc8bb
  Author: Min-Yih Hsu <minyihh at uci.edu>
  Date:   2021-03-08 (Mon, 08 Mar 2021)

  Changed paths:
    M llvm/include/llvm/BinaryFormat/ELF.h
    A llvm/include/llvm/BinaryFormat/ELFRelocs/M68k.def
    M llvm/include/llvm/IR/CallingConv.h
    M llvm/include/llvm/Object/ELFObjectFile.h
    M llvm/include/llvm/module.modulemap
    M llvm/lib/Object/ELF.cpp
    M llvm/lib/ObjectYAML/ELFYAML.cpp
    M llvm/lib/Target/M68k/MCTargetDesc/CMakeLists.txt
    A llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp
    A llvm/lib/Target/M68k/MCTargetDesc/M68kBaseInfo.h
    A llvm/lib/Target/M68k/MCTargetDesc/M68kELFObjectWriter.cpp
    A llvm/lib/Target/M68k/MCTargetDesc/M68kFixupKinds.h
    A llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.cpp
    A llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.h
    A llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.cpp
    A llvm/lib/Target/M68k/MCTargetDesc/M68kMCAsmInfo.h
    A llvm/lib/Target/M68k/MCTargetDesc/M68kMCCodeEmitter.cpp
    M llvm/lib/Target/M68k/MCTargetDesc/M68kMCTargetDesc.cpp
    A llvm/lib/Target/M68k/MCTargetDesc/M68kMCTargetDesc.h
    M llvm/lib/Target/M68k/TargetInfo/M68kTargetInfo.cpp

  Log Message:
  -----------
  [M68k](4/8) MC layer and object file support

 - Add the M68k-specific MC layer implementation
 - Add ELF support for M68k
 - Add M68k-specifc CC and reloc

TODO: Currently AsmParser and disassembler are not implemented yet.
Please use this bug to track the status:
https://bugs.llvm.org/show_bug.cgi?id=48976

Authors: myhsu, m4yers, glaubitz

Differential Revision: https://reviews.llvm.org/D88390

  Commit: 5ac19e0acf86ec2b080aaee6dd9226d64778ce83
      https://github.com/llvm/llvm-project/commit/5ac19e0acf86ec2b080aaee6dd9226d64778ce83
  Author: Min-Yih Hsu <minyihh at uci.edu>
  Date:   2021-03-08 (Mon, 08 Mar 2021)

  Changed paths:
    M llvm/lib/Target/M68k/CMakeLists.txt
    A llvm/lib/Target/M68k/M68k.h
    A llvm/lib/Target/M68k/M68kAsmPrinter.cpp
    A llvm/lib/Target/M68k/M68kAsmPrinter.h
    A llvm/lib/Target/M68k/M68kCallingConv.h
    A llvm/lib/Target/M68k/M68kCollapseMOVEMPass.cpp
    A llvm/lib/Target/M68k/M68kExpandPseudo.cpp
    A llvm/lib/Target/M68k/M68kFrameLowering.cpp
    A llvm/lib/Target/M68k/M68kFrameLowering.h
    A llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp
    A llvm/lib/Target/M68k/M68kISelLowering.cpp
    A llvm/lib/Target/M68k/M68kISelLowering.h
    A llvm/lib/Target/M68k/M68kInstrBuilder.h
    A llvm/lib/Target/M68k/M68kInstrInfo.cpp
    A llvm/lib/Target/M68k/M68kInstrInfo.h
    A llvm/lib/Target/M68k/M68kMCInstLower.cpp
    A llvm/lib/Target/M68k/M68kMCInstLower.h
    A llvm/lib/Target/M68k/M68kMachineFunction.cpp
    A llvm/lib/Target/M68k/M68kMachineFunction.h
    A llvm/lib/Target/M68k/M68kRegisterInfo.cpp
    A llvm/lib/Target/M68k/M68kRegisterInfo.h
    A llvm/lib/Target/M68k/M68kSubtarget.cpp
    A llvm/lib/Target/M68k/M68kSubtarget.h
    M llvm/lib/Target/M68k/M68kTargetMachine.cpp
    A llvm/lib/Target/M68k/M68kTargetMachine.h
    A llvm/lib/Target/M68k/M68kTargetObjectFile.cpp
    A llvm/lib/Target/M68k/M68kTargetObjectFile.h

  Log Message:
  -----------
  [M68k](5/8) Target-specific lowering

 - TargetMachine implementation for M68k
 - ISel, ISched for M68k
 - Other lowering (e.g. FrameLowering)
 - AsmPrinter

Authors: myhsu, m4yers, glaubitz

Differential Revision: https://reviews.llvm.org/D88391

  Commit: c23a780c306c410008ab127009cda26c7d9e5966
      https://github.com/llvm/llvm-project/commit/c23a780c306c410008ab127009cda26c7d9e5966
  Author: Min-Yih Hsu <minyihh at uci.edu>
  Date:   2021-03-08 (Mon, 08 Mar 2021)

  Changed paths:
    A llvm/test/CodeGen/M68k/Alloc/dyn_alloca_aligned.ll
    A llvm/test/CodeGen/M68k/Arith/add-with-overflow.ll
    A llvm/test/CodeGen/M68k/Arith/add.ll
    A llvm/test/CodeGen/M68k/Arith/divide-by-constant.ll
    A llvm/test/CodeGen/M68k/Arith/imul-neg.ll
    A llvm/test/CodeGen/M68k/Arith/imul.ll
    A llvm/test/CodeGen/M68k/Arith/lshr.ll
    A llvm/test/CodeGen/M68k/Arith/mul64.ll
    A llvm/test/CodeGen/M68k/Arith/sdiv-exact.ll
    A llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll
    A llvm/test/CodeGen/M68k/Arith/sub-with-overflow.ll
    A llvm/test/CodeGen/M68k/Arith/sub.ll
    A llvm/test/CodeGen/M68k/Arith/umul-with-overflow.ll
    A llvm/test/CodeGen/M68k/CConv/c-args-inreg.ll
    A llvm/test/CodeGen/M68k/CConv/c-args.ll
    A llvm/test/CodeGen/M68k/CConv/c-call.ll
    A llvm/test/CodeGen/M68k/CConv/fastcc-args.ll
    A llvm/test/CodeGen/M68k/CConv/fastcc-call.ll
    A llvm/test/CodeGen/M68k/CodeModel/medium-pic.ll
    A llvm/test/CodeGen/M68k/CodeModel/medium-pie-global-access.ll
    A llvm/test/CodeGen/M68k/CodeModel/medium-pie.ll
    A llvm/test/CodeGen/M68k/CodeModel/medium-static.ll
    A llvm/test/CodeGen/M68k/CodeModel/small-pic.ll
    A llvm/test/CodeGen/M68k/CodeModel/small-pie-global-access.ll
    A llvm/test/CodeGen/M68k/CodeModel/small-pie.ll
    A llvm/test/CodeGen/M68k/CodeModel/small-static.ll
    A llvm/test/CodeGen/M68k/CollapseMOVEM.mir
    A llvm/test/CodeGen/M68k/Control/cmp.ll
    A llvm/test/CodeGen/M68k/Control/long-setcc.ll
    A llvm/test/CodeGen/M68k/Control/setcc.ll
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_FMI.mir
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_FMR.mir
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_RFRI.mir
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_RFRI_xEA.mir
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_RFRM.mir
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_RFRRF.mir
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_RFRR_EAd.mir
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxBiArOp_RFRR_xEA.mir
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxCMP_BI.mir
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxCMP_MI.mir
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxCMP_RI.mir
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxCMP_RM.mir
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxCMP_RR.mir
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxDiMu.mir
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxExt.mir
    A llvm/test/CodeGen/M68k/Encoding/Arith/Classes/MxNEG.mir
    A llvm/test/CodeGen/M68k/Encoding/Bits/Classes/MxBTST_MI.mir
    A llvm/test/CodeGen/M68k/Encoding/Bits/Classes/MxBTST_MR.mir
    A llvm/test/CodeGen/M68k/Encoding/Bits/Classes/MxBTST_RI.mir
    A llvm/test/CodeGen/M68k/Encoding/Bits/Classes/MxBTST_RR.mir
    A llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxBRA.mir
    A llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxBcc.mir
    A llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxCALL.mir
    A llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxJMP.mir
    A llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxNOP.mir
    A llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxRTS.mir
    A llvm/test/CodeGen/M68k/Encoding/Control/Classes/MxScc.mir
    A llvm/test/CodeGen/M68k/Encoding/Control/branch-pc-rel.mir
    A llvm/test/CodeGen/M68k/Encoding/Control/call-pc-rel.mir
    A llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxLEA.mir
    A llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMOVEM_MR.mir
    A llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMOVEM_RM.mir
    A llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMoveCCR.mir
    A llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_MI.mir
    A llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_MM.mir
    A llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_MR.mir
    A llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_RI.mir
    A llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_RM.mir
    A llvm/test/CodeGen/M68k/Encoding/Data/Classes/MxMove_RR.mir
    A llvm/test/CodeGen/M68k/Encoding/README.md
    A llvm/test/CodeGen/M68k/Encoding/Relaxations/branch.mir
    A llvm/test/CodeGen/M68k/Encoding/Relocations/data-abs.mir
    A llvm/test/CodeGen/M68k/Encoding/Relocations/data-gotoff.mir
    A llvm/test/CodeGen/M68k/Encoding/Relocations/data-gotpcrel.mir
    A llvm/test/CodeGen/M68k/Encoding/Relocations/data-pc-rel.mir
    A llvm/test/CodeGen/M68k/Encoding/Relocations/text-plt.mir
    A llvm/test/CodeGen/M68k/Encoding/ShiftRotate/Classes/MxSR_DD.mir
    A llvm/test/CodeGen/M68k/Encoding/ShiftRotate/Classes/MxSR_DI.mir
    A llvm/test/CodeGen/M68k/lit.local.cfg
    A llvm/test/CodeGen/M68k/varargs.ll
    M llvm/utils/UpdateTestChecks/asm.py
    A llvm/utils/extract-section.py

  Log Message:
  -----------
  [M68k][test](6/8) Add all of the tests

And a small utilities -- extract-section.py -- that helps extracting
specific object file section and printing in textual format. This
utility is just a workaround for tests inside `Encoding`. Hopefully in
the future we can replace dependencies in those tests with existing tools
(e.g. llvm-readobj). Please refer to this bug for more context:
https://bugs.llvm.org/show_bug.cgi?id=49245

Note that since we don't have AsmParser for now, we are testing the MC
part using MIR as input and put those tests under the `Encoding` folder.
In the future when AsmParser (and disassembler) is finished, those tests
will be moved to `test/MC/M68k`.

Authors: myhsu, m4yers, glaubitz

Differential Revision: https://reviews.llvm.org/D88392

  Commit: 5eb7a5814a5c629378ba2a4a45fc65cd7f183c9c
      https://github.com/llvm/llvm-project/commit/5eb7a5814a5c629378ba2a4a45fc65cd7f183c9c
  Author: Min-Yih Hsu <minyihh at uci.edu>
  Date:   2021-03-08 (Mon, 08 Mar 2021)

  Changed paths:
    M clang/include/clang/Basic/Attr.td
    M clang/lib/Basic/CMakeLists.txt
    M clang/lib/Basic/Targets.cpp
    A clang/lib/Basic/Targets/M68k.cpp
    A clang/lib/Basic/Targets/M68k.h
    M clang/lib/CodeGen/TargetInfo.cpp
    M clang/lib/Sema/SemaDeclAttr.cpp

  Log Message:
  -----------
  [cfe][M68k](7/8) Clang basic support

This is the first patch supporting M68k in Clang
 - Register M68k as a target
 - Target specific CodeGen support
 - Target specific attribute support

Authors: myhsu, m4yers, glaubitz

Differential Revision: https://reviews.llvm.org/D88393

  Commit: 5509748f2ce5e06bda7da754297d09a0e68a1f30
      https://github.com/llvm/llvm-project/commit/5509748f2ce5e06bda7da754297d09a0e68a1f30
  Author: Min-Yih Hsu <minyihh at uci.edu>
  Date:   2021-03-08 (Mon, 08 Mar 2021)

  Changed paths:
    M clang/include/clang/Driver/Options.td
    M clang/lib/Driver/CMakeLists.txt
    A clang/lib/Driver/ToolChains/Arch/M68k.cpp
    A clang/lib/Driver/ToolChains/Arch/M68k.h
    M clang/lib/Driver/ToolChains/Clang.cpp
    M clang/lib/Driver/ToolChains/CommonArgs.cpp
    M clang/lib/Driver/ToolChains/Gnu.cpp
    M clang/lib/Driver/ToolChains/Linux.cpp
    A clang/test/Driver/m68k-features.cpp
    A clang/test/Driver/m68k-sub-archs.cpp

  Log Message:
  -----------
  [cfe][driver][M68k](8/8) Clang driver support

Add M68k-specific toolchain and driver configurations / options.

Authors: myhsu, m4yers, glaubitz

Differential Revision: https://reviews.llvm.org/D88394

Compare: https://github.com/llvm/llvm-project/compare/e81d813717b2...5509748f2ce5