[all-commits] [llvm/llvm-project] 0eb405: [SelectionDAG] Add computeKnownBits support for IS...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0eb405c3b8e2bef5f80499991d67a7bf9e419412
      https://github.com/llvm/llvm-project/commit/0eb405c3b8e2bef5f80499991d67a7bf9e419412
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-03-07 (Sun, 07 Mar 2021)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/test/CodeGen/AMDGPU/usubsat.ll
    M llvm/test/CodeGen/ARM/usub_sat.ll
    M llvm/test/CodeGen/ARM/usub_sat_plus.ll
    M llvm/test/CodeGen/RISCV/usub_sat.ll
    M llvm/test/CodeGen/X86/combine-sub-usat.ll
    M llvm/test/CodeGen/X86/usub_sat.ll
    M llvm/test/CodeGen/X86/usub_sat_plus.ll

  Log Message:
  -----------
  [SelectionDAG] Add computeKnownBits support for ISD::USUBSAT.

The result of ISD::USUBSAT will never be larger than the LHS. We
can use this to put a bound on the number of leading zeros.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D98133