[all-commits] [llvm/llvm-project] b46c08: [NFCI] SCEVExpander: emit intrinsics for integral ...

[Roman Lebedev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b46c085d2b6d15873fb53718f0a70b3848e19e4a
      https://github.com/llvm/llvm-project/commit/b46c085d2b6d15873fb53718f0a70b3848e19e4a
  Author: Roman Lebedev <lebedev.ri at gmail.com>
  Date:   2021-03-06 (Sat, 06 Mar 2021)

  Changed paths:
    M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
    M llvm/test/Analysis/ScalarEvolution/2007-08-06-MisinterpretBranch.ll
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/unpredload.ll
    M llvm/test/Transforms/HardwareLoops/ARM/fp-emulation.ll
    M llvm/test/Transforms/HardwareLoops/ARM/simple-do.ll
    M llvm/test/Transforms/HardwareLoops/loop-guards.ll
    M llvm/test/Transforms/IRCE/bad_expander.ll
    M llvm/test/Transforms/IRCE/clamp.ll
    M llvm/test/Transforms/IRCE/conjunctive-checks.ll
    M llvm/test/Transforms/IRCE/correct-loop-info.ll
    M llvm/test/Transforms/IRCE/decrementing-loop.ll
    M llvm/test/Transforms/IRCE/multiple-access-no-preloop.ll
    M llvm/test/Transforms/IRCE/non-loop-invariant-rhs-instr.ll
    M llvm/test/Transforms/IRCE/range_intersect_miscompile.ll
    M llvm/test/Transforms/IRCE/ranges_of_different_types.ll
    M llvm/test/Transforms/IRCE/rc-negative-bound.ll
    M llvm/test/Transforms/IRCE/single-access-no-preloop.ll
    M llvm/test/Transforms/IRCE/single-access-with-preloop.ll
    M llvm/test/Transforms/IRCE/unsigned_comparisons_ugt.ll
    M llvm/test/Transforms/IRCE/unsigned_comparisons_ult.ll
    M llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll
    M llvm/test/Transforms/IndVarSimplify/X86/eliminate-trunc.ll
    M llvm/test/Transforms/IndVarSimplify/X86/iv-widen.ll
    M llvm/test/Transforms/IndVarSimplify/X86/loop-invariant-conditions.ll
    M llvm/test/Transforms/IndVarSimplify/elim-extend.ll
    M llvm/test/Transforms/IndVarSimplify/eliminate-comparison.ll
    M llvm/test/Transforms/IndVarSimplify/full_widening.ll
    M llvm/test/Transforms/IndVarSimplify/lcssa-preservation.ll
    M llvm/test/Transforms/IndVarSimplify/lftr-multi-exit.ll
    M llvm/test/Transforms/IndVarSimplify/lftr-reuse.ll
    M llvm/test/Transforms/IndVarSimplify/loop-predication.ll
    M llvm/test/Transforms/IndVarSimplify/no-iv-rewrite.ll
    M llvm/test/Transforms/IndVarSimplify/replace-loop-exit-folds.ll
    M llvm/test/Transforms/IndVarSimplify/sentinel.ll
    M llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
    M llvm/test/Transforms/LoopPredication/predicate-exits.ll
    M llvm/test/Transforms/LoopUnroll/runtime-loop-multiexit-dom-verify.ll
    M llvm/test/Transforms/LoopVectorize/X86/cost-model-assert.ll
    M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
    M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
    M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
    M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
    M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
    M llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
    M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
    M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
    M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
    M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
    M llvm/test/Transforms/LoopVectorize/loop-form.ll

  Log Message:
  -----------
  [NFCI] SCEVExpander: emit intrinsics for integral {u,s}{min,max} SCEV expressions

These intrinsics, not the icmp+select are the canonical form nowadays,
so we might as well directly emit them.

This should not cause any regressions, but if it does,
then then they would needed to be fixed regardless.

Note that this doesn't deal with `SCEVExpander::isHighCostExpansion()`,
but that is a pessimization, not a correctness issue.

Additionally, the non-intrinsic form has issues with undef,
see https://reviews.llvm.org/D88287#2587863