[all-commits] [llvm/llvm-project] d44f61: Reland [GlobalISel] Combine zext(trunc x) to x

[petar-avramovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d44f61f81ca0be535e0e2de4c0f29059e2cb3471
      https://github.com/llvm/llvm-project/commit/d44f61f81ca0be535e0e2de4c0f29059e2cb3471
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2021-03-05 (Fri, 05 Mar 2021)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
    M llvm/include/llvm/Target/GlobalISel/Combine.td
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-zext-trunc.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll

  Log Message:
  -----------
  Reland [GlobalISel] Combine zext(trunc x) to x

Recommit 4112299ee761a9b6a309c8ff4a7e75f8c8d8851b. Depends on
4c8fb7ddd6fa49258e0e9427e7345fb56ba522d4 which was reverted.

Combine zext(trunc x) to x when truncated bits are known to be zero.

Differential Revision: https://reviews.llvm.org/D96031


  Commit: 36beaa3ba3b334fa0be0afd0a2b0da9c7c8afd34
      https://github.com/llvm/llvm-project/commit/36beaa3ba3b334fa0be0afd0a2b0da9c7c8afd34
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2021-03-05 (Fri, 05 Mar 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll

  Log Message:
  -----------
  Reland AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect

Recommit bf5a5826504754788a8f1e3fec7a7dc95cda5782. Depends on
4c8fb7ddd6fa49258e0e9427e7345fb56ba522d4 which was reverted.

RegBankSelect creates zext and trunc when it selects banks for uniform i1.
Add zext_trunc_fold from generic combiner to post RegBankSelect combiner.

Differential Revision: https://reviews.llvm.org/D95432


Compare: https://github.com/llvm/llvm-project/compare/fec0a0adac54...36beaa3ba3b3