[all-commits] [llvm/llvm-project] 501f6a: [AArch64][GlobalISel][RegBankSelect] Improve rbs o...

[Amara Emerson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 501f6a4e9e60fe54345f687d5d38f1cab52517ad
      https://github.com/llvm/llvm-project/commit/501f6a4e9e60fe54345f687d5d38f1cab52517ad
  Author: Amara Emerson <amara at apple.com>
  Date:   2021-03-04 (Thu, 04 Mar 2021)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-build-vector.mir
    M llvm/test/CodeGen/AArch64/combine-loads.ll

  Log Message:
  -----------
  [AArch64][GlobalISel][RegBankSelect] Improve rbs of G_BUILD_VECTOR when fed by fp values.

This is actually two changes. One is to avoid copies when fp values are fed into
a build_vector, without being able to tell from the opcode.

The other is that build_vectors are also marked as only defining FP, since they
produce vector results.

Differential Revision: https://reviews.llvm.org/D97968