[all-commits] [llvm/llvm-project] 4e3933: [mlir] Add an AccessGroup attribute to load/store ...

[Arpith Jacob via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4e393350c547edb8144592168c3b176646747a98
      https://github.com/llvm/llvm-project/commit/4e393350c547edb8144592168c3b176646747a98
  Author: Arpith C. Jacob <arpith at google.com>
  Date:   2021-03-04 (Thu, 04 Mar 2021)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
    M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
    M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
    M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
    M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
    M mlir/test/Dialect/LLVMIR/invalid.mlir
    M mlir/test/Target/llvmir.mlir
    M mlir/test/mlir-tblgen/llvm-intrinsics.td
    M mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp

  Log Message:
  -----------
  [mlir] Add an AccessGroup attribute to load/store LLVM dialect ops and generate the access_group LLVM metadata.

This also includes LLVM dialect ops created from intrinsics.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D97944