[all-commits] [llvm/llvm-project] 8a3160: [AArch64][GlobalISel] Enable use of the optsize pr...
Amara Emerson via All-commits
all-commits at lists.llvm.org
Tue Mar 2 12:57:07 PST 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 8a316045ede4f598c22a175875231684ac2fb234
https://github.com/llvm/llvm-project/commit/8a316045ede4f598c22a175875231684ac2fb234
Author: Amara Emerson <amara at apple.com>
Date: 2021-03-02 (Tue, 02 Mar 2021)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h
M llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
M llvm/test/CodeGen/AArch64/GlobalISel/select-imm.mir
M llvm/test/CodeGen/AArch64/O0-pipeline.ll
M llvm/utils/TableGen/GlobalISelEmitter.cpp
Log Message:
-----------
[AArch64][GlobalISel] Enable use of the optsize predicate in the selector.
To do this while supporting the existing functionality in SelectionDAG of using
PGO info, we add the ProfileSummaryInfo and LazyBlockFrequencyInfo analysis
dependencies to the instruction selector pass.
Then, use the predicate to generate constant pool loads for f32 materialization,
if we're targeting optsize/minsize.
Differential Revision: https://reviews.llvm.org/D97732
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