[all-commits] [llvm/llvm-project] 7fce33: [SDAG] allow vector types for select->logic folds

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  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7fce3322a28303b864d912d8ac198f49e61f9f52
      https://github.com/llvm/llvm-project/commit/7fce3322a28303b864d912d8ac198f49e61f9f52
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-03-02 (Tue, 02 Mar 2021)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/select-with-and-or.ll
    M llvm/test/CodeGen/X86/select-with-and-or.ll

  Log Message:
  -----------
  [SDAG] allow vector types for select->logic folds

This prepares codegen for a change that will remove the identical
folds from IR because they are not poison-safe. See
D93065 / D97360
for details.

We already generically support scalar types, and there are various
target-specific transforms that overlap the vector folds. For example,
x86 recognizes the and patterns, but not or. We can end up with 1
extra instruction there, but I think that is still preferred over the
blendv alternative that loads a constant vector.

If this is not optimal, then it should be fixed with a later transform
(this change is not expected to result in any regressions because
InstCombine currently does the same thing).

Removing custom code and supporting undefs in constant-pattern-matching
can be follow-up changes.

Differential Revision: https://reviews.llvm.org/D97730