[all-commits] [llvm/llvm-project] a9f9ce: [X86] Use correct padding when in 16-bit mode
Bill Wendling via All-commits
all-commits at lists.llvm.org
Thu Feb 25 20:06:04 PST 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: a9f9ceb35f8117ca2c969dfa6614412e00797d45
https://github.com/llvm/llvm-project/commit/a9f9ceb35f8117ca2c969dfa6614412e00797d45
Author: Bill Wendling <isanbard at gmail.com>
Date: 2021-02-25 (Thu, 25 Feb 2021)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
A llvm/test/MC/X86/code16gcc-align.s
Log Message:
-----------
[X86] Use correct padding when in 16-bit mode
In 16-bit mode, some of the nop patterns used in 32-bit mode can end up
mangling other instructions. For instance, an aligned "movz" instruction
may have the 0x66 and 0x67 prefixes omitted, because the nop that's used
messes things up.
xorl %ebx, %ebx
.p2align 4, 0x90
movzbl (%esi,%ebx), %ecx
Use instead nop patterns we know 16-bit mode can handle.
Differential Revision: https://reviews.llvm.org/D97268
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