[all-commits] [llvm/llvm-project] 705068: [mlir][linalg] Support for using output values in ...
Han-Chung Wang via All-commits
all-commits at lists.llvm.org
Wed Feb 24 11:38:36 PST 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 705068cb8c4d86c798c4134f0a332f4a45c7df04
https://github.com/llvm/llvm-project/commit/705068cb8c4d86c798c4134f0a332f4a45c7df04
Author: Hanhan Wang <hanchung at google.com>
Date: 2021-02-24 (Wed, 24 Feb 2021)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOpsSpec.tc
M mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc
M mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp
Log Message:
-----------
[mlir][linalg] Support for using output values in TC definitions.
This will allow us to define select(pred, in, out) for TC ops, which is useful
for pooling ops.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D97312
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