[all-commits] [llvm/llvm-project] 1697cc: [RISCV] Add support for integer fixed vector setcc

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1697cc78b140fca5bb55f9d16b40aaf435a8a891
      https://github.com/llvm/llvm-project/commit/1697cc78b140fca5bb55f9d16b40aaf435a8a891
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-02-12 (Fri, 12 Feb 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll

  Log Message:
  -----------
  [RISCV] Add support for integer fixed vector setcc

I believe I've covered all orderings of splat operands here. Better
canonicalization in lowering might help reduce this. I did not handle
the immediate adjustments needed for set(u)gt/set(u)lt.

Testing here is limited to byte types because the scalable vector
type used for masks for the store is calculated assuming 8 byte
elements. But for the setcc its based on the element count of the
container type for the setcc input. So they don't agree. We'll need
to enhanced D96352 to handle this I think.

Differential Revision: https://reviews.llvm.org/D96443