[all-commits] [llvm/llvm-project] 1db7b9: [ARM] Make a BE predicate bitcast consistent with ...

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  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1db7b9ceaae43ab3c44ac96e238ec078538204ea
      https://github.com/llvm/llvm-project/commit/1db7b9ceaae43ab3c44ac96e238ec078538204ea
  Author: David Green <david.green at arm.com>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll
    M llvm/test/CodeGen/Thumb2/mve-masked-load.ll
    M llvm/test/CodeGen/Thumb2/mve-masked-store.ll
    M llvm/test/CodeGen/Thumb2/mve-pred-bitcast.ll
    M llvm/test/CodeGen/Thumb2/mve-pred-loadstore.ll

  Log Message:
  -----------
  [ARM] Make a BE predicate bitcast consistent with the rest of llvm

We were storing predicate registers, such as a <8 x i1>, in the opposite
order to how the rest of llvm expects. This actually turns out to be
correct for the one place that usually uses it - the
ScalarizeMaskedMemIntrin pass, but only because the pass was incorrect
itself. This fixes the order so that bits are stored in the opposite
order and bitcasts work as expected. This allows the Scalarization pass
to be fixed, as in https://reviews.llvm.org/D94765.

Differential Revision: https://reviews.llvm.org/D94867


  Commit: 9498315c9ba35b41e6b82f33ca629482d6db72b9
      https://github.com/llvm/llvm-project/commit/9498315c9ba35b41e6b82f33ca629482d6db72b9
  Author: Markus Lavin <markus.lavin at ericsson.com>
  Date:   2021-02-11 (Thu, 11 Feb 2021)

  Changed paths:
    M llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
    M llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll
    M llvm/test/CodeGen/Thumb2/mve-masked-load.ll
    M llvm/test/CodeGen/Thumb2/mve-masked-store.ll
    M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-load.ll
    M llvm/test/Transforms/ScalarizeMaskedMemIntrin/AArch64/expand-masked-store.ll

  Log Message:
  -----------
  Expand masked mem intrinsics correctly wrt big-endian

Need to take endianness into account when doing vector to scalar casts
such as %bc = bitcast <8 x i1> %v to i8
Companion commit for https://reviews.llvm.org/D94867
Upload in response to
https://lists.llvm.org/pipermail/llvm-dev/2021-January/147862.html
Attempting to document the actual memory layout rules for vectors in
https://reviews.llvm.org/D94964

Differential Revision: https://reviews.llvm.org/D94765


Compare: https://github.com/llvm/llvm-project/compare/e159a3ced4c5...9498315c9ba3