[all-commits] [llvm/llvm-project] 5f7a4d: [AArch64][GlobalISel] Perform load/store extended ...

[Jessica Paquette via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5f7a4d8d05896c2d54a3d67cc3fd1fd81a84b2df
      https://github.com/llvm/llvm-project/commit/5f7a4d8d05896c2d54a3d67cc3fd1fd81a84b2df
  Author: Jessica Paquette <jpaquette at apple.com>
  Date:   2021-02-10 (Wed, 10 Feb 2021)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/load-addressing-modes.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] Perform load/store extended reg folding with optsize

GlobalISel was only doing this with minsize. SDAG does this with optsize.

(See: `SelectionDAG::shouldOptForSize()`)

This is a 0.3% code size improvement for CTMark at -Os.

(Best: 1.1% improvements on lencod + pairlocalalign)

Differential Revision: https://reviews.llvm.org/D96451