[all-commits] [llvm/llvm-project] b46aac: [RISCV] Support the scalable-vector fadd reduction...

[Fraser Cormack via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b46aac125d52f4876adad7cb62c107d951557880
      https://github.com/llvm/llvm-project/commit/b46aac125d52f4876adad7cb62c107d951557880
  Author: Fraser Cormack <fraser at codeplay.com>
  Date:   2021-02-08 (Mon, 08 Feb 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    A llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll

  Log Message:
  -----------
  [RISCV] Support the scalable-vector fadd reduction intrinsic

This patch adds support for both the fadd reduction intrinsic, in both
the ordered and unordered modes.

The fmin and fmax intrinsics are not currently supported due to a
discrepancy between the LLVM semantics and the RVV ISA behaviour with
regards to signaling NaNs. This behaviour is likely fixed in version 2.3
of the RISC-V F/D/Q extension, but until then the intrinsics can be left
unsupported.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D95870