[all-commits] [llvm/llvm-project] 2303e9: [Codegen][ReplaceWithVecLib] add pass to replace v...
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Fri Feb 5 11:25:42 PST 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 2303e93e666e13ebf6d24323729c28f520ecca37
https://github.com/llvm/llvm-project/commit/2303e93e666e13ebf6d24323729c28f520ecca37
Author: Lukas Sommer <sommer at esa.tu-darmstadt.de>
Date: 2021-02-05 (Fri, 05 Feb 2021)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/CodeGen/MachinePassRegistry.def
M llvm/include/llvm/CodeGen/Passes.h
A llvm/include/llvm/CodeGen/ReplaceWithVeclib.h
M llvm/include/llvm/InitializePasses.h
M llvm/lib/CodeGen/CMakeLists.txt
A llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/ARM/O3-pipeline.ll
A llvm/test/CodeGen/Generic/replace-intrinsics-with-veclib.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/tools/llc/llc.cpp
M llvm/tools/opt/opt.cpp
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
[Codegen][ReplaceWithVecLib] add pass to replace vector intrinsics with calls to vector library
This patch adds a pass to replace calls to vector intrinsics
(i.e., LLVM intrinsics operating on vector operands) with
calls to a vector library.
Currently, calls to LLVM intrinsics are only replaced with
calls to vector libraries when scalar calls to intrinsics are
vectorized by the Loop- or SLP-Vectorizer.
With this pass, it is now possible to replace calls to LLVM
intrinsics already operating on vector operands, e.g., if
such code was generated by MLIR. For the replacement,
information from the TargetLibraryInfo, e.g., as specified
via -vector-library is used.
Differential Revision: https://reviews.llvm.org/D95373
Commit: 3d10a0bdabaa2446dd154e1481bfd2e464910a0e
https://github.com/llvm/llvm-project/commit/3d10a0bdabaa2446dd154e1481bfd2e464910a0e
Author: Sanjay Patel <spatel at rotateright.com>
Date: 2021-02-05 (Fri, 05 Feb 2021)
Changed paths:
M llvm/test/Transforms/Reassociate/add-like-or.ll
Log Message:
-----------
[Reassociate] add test for shl+or; NFC
Commit: 8d9527a0bfc8d6bf2b83cf8893be93af6fbee3a9
https://github.com/llvm/llvm-project/commit/8d9527a0bfc8d6bf2b83cf8893be93af6fbee3a9
Author: Sanjay Patel <spatel at rotateright.com>
Date: 2021-02-05 (Fri, 05 Feb 2021)
Changed paths:
A llvm/test/Transforms/PhaseOrdering/X86/pixel-splat.ll
Log Message:
-----------
[PhaseOrdering] add test to show combined result of reassociate+instcombine+vectorizers; NFC
Compare: https://github.com/llvm/llvm-project/compare/e3c0b0fe0958...8d9527a0bfc8
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