[all-commits] [llvm/llvm-project] b3bb5c: [AMDGPU][GlobalISel] Use scalar min/max instructions

[Jay Foad via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b3bb5c3efc971f595a08446f3e58c0fd4162c26d
      https://github.com/llvm/llvm-project/commit/b3bb5c3efc971f595a08446f3e58c0fd4162c26d
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2021-02-04 (Thu, 04 Feb 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smax.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smin.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umax.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umin.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll

  Log Message:
  -----------
  [AMDGPU][GlobalISel] Use scalar min/max instructions

SALU min/max s32 instructions exist so use them. This means that
regbankselect can handle min/max much like add/sub/mul/shifts.

Differential Revision: https://reviews.llvm.org/D96047


  Commit: d84e5fdac1a65732556b9e56984c998aad915139
      https://github.com/llvm/llvm-project/commit/d84e5fdac1a65732556b9e56984c998aad915139
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2021-02-04 (Thu, 04 Feb 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ashr.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-lshr.mir

  Log Message:
  -----------
  [AMDGPU][GlobalISel] Fix v2s16 right shifts

When widening, each half of the v2s16 operands needs to be sign extended
for G_ASHR or zero extended for G_LSHR.

Differential Revision: https://reviews.llvm.org/D96048


Compare: https://github.com/llvm/llvm-project/compare/e4a503a26d55...d84e5fdac1a6