[all-commits] [llvm/llvm-project] 32b7c2: [X86][SSE] Support variable-index float/double vec...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 32b7c2fa42a2fe83f9754f219b3fe07fd1e03c4f
      https://github.com/llvm/llvm-project/commit/32b7c2fa42a2fe83f9754f219b3fe07fd1e03c4f
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2021-02-03 (Wed, 03 Feb 2021)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/insertelement-var-index.ll

  Log Message:
  -----------
  [X86][SSE] Support variable-index float/double vector insertion on SSE41+ targets (PR47924)

Extends D95779 to permit insertion into float/doubles vectors while avoiding a lot of aliased memory traffic.

The scalar value is already on the simd unit, so we only need to transfer and splat the index value, then perform the select.

SSE4 codegen is a little bulky due to the tied register requirements of (non-VEX) BLENDPS/PD but the extra moves are cheap so shouldn't be an actual problem.

Differential Revision: https://reviews.llvm.org/D95866