[all-commits] [llvm/llvm-project] c72257: [ARM] Select VINS from vector inserts

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c72257563347b611733b6744cefc0bf49bab4f8d
      https://github.com/llvm/llvm-project/commit/c72257563347b611733b6744cefc0bf49bab4f8d
  Author: David Green <david.green at arm.com>
  Date:   2021-02-02 (Tue, 02 Feb 2021)

  Changed paths:
    M llvm/lib/Target/ARM/ARMInstrMVE.td
    M llvm/lib/Target/ARM/ARMInstrVFP.td
    M llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
    M llvm/test/CodeGen/Thumb2/mve-div-expand.ll
    M llvm/test/CodeGen/Thumb2/mve-fmas.ll
    M llvm/test/CodeGen/Thumb2/mve-fmath.ll
    M llvm/test/CodeGen/Thumb2/mve-fp-negabs.ll
    M llvm/test/CodeGen/Thumb2/mve-frint.ll
    M llvm/test/CodeGen/Thumb2/mve-gather-ind16-scaled.ll
    M llvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll
    M llvm/test/CodeGen/Thumb2/mve-masked-ldst.ll
    M llvm/test/CodeGen/Thumb2/mve-minmax.ll
    M llvm/test/CodeGen/Thumb2/mve-shuffle.ll
    M llvm/test/CodeGen/Thumb2/mve-shufflemov.ll
    M llvm/test/CodeGen/Thumb2/mve-simple-arith.ll
    M llvm/test/CodeGen/Thumb2/mve-vcmpf.ll
    M llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
    M llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll
    M llvm/test/CodeGen/Thumb2/mve-vcvt.ll
    M llvm/test/CodeGen/Thumb2/mve-vld2.ll
    M llvm/test/CodeGen/Thumb2/mve-vld3.ll
    M llvm/test/CodeGen/Thumb2/mve-vld4.ll
    M llvm/test/CodeGen/Thumb2/mve-vldst4.ll
    M llvm/test/CodeGen/Thumb2/mve-vmovn.ll
    M llvm/test/CodeGen/Thumb2/mve-vmovnstore.ll
    M llvm/test/CodeGen/Thumb2/mve-vst2.ll
    M llvm/test/CodeGen/Thumb2/mve-vst3.ll
    M llvm/test/CodeGen/Thumb2/mve-vst4.ll

  Log Message:
  -----------
  [ARM] Select VINS from vector inserts

This patch adds tablegen patterns for pairs of i16/f16 insert/extracts.
If we are inserting into two adjacent vector lanes (0 and 1 for
example), we can use either a vmov;vins or vmovx;vins to insert the pair
together, avoiding a round-trip from GRP registers. This is quite a
large patterns with a number of EXTRACT_SUBREG/INSERT_SUBREG/
COPY_TO_REGCLASS nodes, but hopefully as most of those become copies all
that will be cleaned up by further optimizations.

The VINS pattern was also adjusted to allow it to represent that it is
inserting into the top half of an existing register.

Differential Revision: https://reviews.llvm.org/D95381