[all-commits] [llvm/llvm-project] d6b68d: [X86][SSE] combineExtractWithShuffle - support zer...
Simon Pilgrim via All-commits
all-commits at lists.llvm.org
Fri Jan 29 06:28:09 PST 2021
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: d6b68d134415300cad55220bfb80e4934217ba19
https://github.com/llvm/llvm-project/commit/d6b68d134415300cad55220bfb80e4934217ba19
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2021-01-29 (Fri, 29 Jan 2021)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avg.ll
M llvm/test/CodeGen/X86/buildvec-insertvec.ll
M llvm/test/CodeGen/X86/promote-vec3.ll
M llvm/test/CodeGen/X86/shrink_vmul.ll
M llvm/test/CodeGen/X86/udiv_fix.ll
M llvm/test/CodeGen/X86/udiv_fix_sat.ll
M llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll
M llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
Log Message:
-----------
[X86][SSE] combineExtractWithShuffle - support zero-extending to allow extracting from narrow shuffle masks
If the shuffle mask can't be widened to match the original extracted element width, see if the upper bits are zeroable - which allows us to extract+zero-extend the smaller extraction.
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