[all-commits] [llvm/llvm-project] 242617: [GlobalISel] Add G_ASSERT_ZEXT

Jessica Paquette via All-commits all-commits at lists.llvm.org
Thu Jan 28 13:59:51 PST 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 24261729a49feb4cf0376c6f9326374ab28ec0a5
      https://github.com/llvm/llvm-project/commit/24261729a49feb4cf0376c6f9326374ab28ec0a5
  Author: Jessica Paquette <jpaquette at apple.com>
  Date:   2021-01-28 (Thu, 28 Jan 2021)

  Changed paths:
    M llvm/docs/GlobalISel/GenericOpcode.rst
    M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
    M llvm/include/llvm/CodeGen/TargetOpcodes.h
    M llvm/include/llvm/Support/TargetOpcodes.def
    M llvm/include/llvm/Target/GenericOpcodes.td
    M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
    M llvm/lib/CodeGen/MachineVerifier.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/legalize-ignore-hint.mir
    A llvm/test/MachineVerifier/test_g_assert_zext.mir
    A llvm/test/MachineVerifier/test_g_assert_zext_register_bank_class.mir

  Log Message:
  -----------
  [GlobalISel] Add G_ASSERT_ZEXT

This adds a generic opcode which communicates that a type has already been
zero-extended from a narrower type.

This is intended to be similar to AssertZext in SelectionDAG.

For example,

```
%x_was_extended:_(s64) = G_ASSERT_ZEXT %x, 16
```

Signifies that the top 48 bits of %x are known to be 0.

This is useful in cases like this:

```
define i1 @zeroext_param(i8 zeroext %x) {
  %cmp = icmp ult i8 %x, -20
  ret i1 %cmp
}
```

In AArch64, `%x` must use a 32-bit register, which is then truncated to a 8-bit
value.

If we know that `%x` is already zero-ed out in the relevant high bits, we can
avoid the truncate.

Currently, in GISel, this looks like this:

```
_zeroext_param:
  and w8, w0, #0xff ; We don't actually need this!
  cmp w8, #236
  cset w0, lo
  ret
```

While SDAG does not produce the truncation, since it knows that it's
unnecessary:

```
_zeroext_param:
  cmp w0, #236
  cset w0, lo
  ret
```

This patch

- Adds G_ASSERT_ZEXT
- Adds MIRBuilder support for it
- Adds MachineVerifier support for it
- Documents it

It also puts G_ASSERT_ZEXT into its own class of "hint instruction." (There
should be a G_ASSERT_SEXT in the future, maybe a G_ASSERT_ALIGN as well.)

This allows us to skip over hints in the legalizer etc. These can then later
be selected like COPY instructions or removed.

Differential Revision: https://reviews.llvm.org/D95564




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