[all-commits] [llvm/llvm-project] b7d632: IntrinsicEmitter: Change IntrinsicsToAttributesMap...

Ben Shi via All-commits all-commits at lists.llvm.org
Wed Jan 27 23:16:12 PST 2021


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: b7d63244226ba2c0df651622fe7fe3f5f8aba262
      https://github.com/llvm/llvm-project/commit/b7d63244226ba2c0df651622fe7fe3f5f8aba262
  Author: Fangrui Song <i at maskray.me>
  Date:   2021-01-27 (Wed, 27 Jan 2021)

  Changed paths:
    M llvm/utils/TableGen/IntrinsicEmitter.cpp

  Log Message:
  -----------
  IntrinsicEmitter: Change IntrinsicsToAttributesMap from uint8_t[] to uint16_t[]

We need at least 252 UniqAttributes now, which will soon overflow.
Actually with downstream backends we can easily use up the last few values.
So bump to uint16_t.


  Commit: 5d05cdf55cdb3910d152ceb967de13bdd6295f56
      https://github.com/llvm/llvm-project/commit/5d05cdf55cdb3910d152ceb967de13bdd6295f56
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-01-27 (Wed, 27 Jan 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
    M llvm/test/CodeGen/RISCV/atomic-rmw.ll
    M llvm/test/CodeGen/RISCV/shift-masked-shamt.ll

  Log Message:
  -----------
  [RISCV] Copy isUnneededShiftMask from X86.

In d2927f786e877410d90c1e6f0e0c7d99524529c5, I added patterns
to remove (and X, 31) from sllw/srlw/sraw shift amounts.

There is code in SelectionDAGISel.cpp that knows to use
computeKnownBits to fill in bits of the mask that were removed
by SimplifyDemandedBits based on bits being known zero.

The non-W shift patterns use immbottomxlenset which allows the
mask to have more than log2(xlen) trailing ones, but doesn't
have a call to computeKnownBits to fill in bits of the mask that may
have been cleared by SimplifyDemandedBits.

This patch copies code from X86 to handle more than log2(xlen)
bottom bits set and uses computeKnownBits to fill in missing bits
before counting.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D95422


  Commit: 7e99bddfeaab2713a8bb6ca538da25b66e6efc59
      https://github.com/llvm/llvm-project/commit/7e99bddfeaab2713a8bb6ca538da25b66e6efc59
  Author: Hongtao Yu <hoy at fb.com>
  Date:   2021-01-27 (Wed, 27 Jan 2021)

  Changed paths:
    M llvm/include/llvm/ProfileData/SampleProf.h
    M llvm/include/llvm/ProfileData/SampleProfReader.h
    M llvm/lib/ProfileData/SampleProfReader.cpp
    M llvm/lib/ProfileData/SampleProfWriter.cpp
    M llvm/lib/Transforms/IPO/SampleContextTracker.cpp
    M llvm/test/Transforms/SampleProfile/profile-context-tracker.ll
    A llvm/test/tools/llvm-profdata/Inputs/cs-sample.proftext
    A llvm/test/tools/llvm-profdata/cs-sample-profile.test
    M llvm/tools/llvm-profdata/llvm-profdata.cpp
    M llvm/tools/llvm-profgen/ProfileGenerator.cpp

  Log Message:
  -----------
  [CSSPGO] Support of CS profiles in extended binary format.

This change brings up support of context-sensitive profiles in the format of extended binary. Existing sample profile reader/writer/merger code is being tweaked to reflect the fact of bracketed input contexts, like (`[...]`). The paired brackets are also needed in extbinary profiles because we don't yet have an otherwise good way to tell calling contexts apart from regular function names since the context delimiter `@` can somehow serve as a part of the C++ mangled names.

Reviewed By: wmi, wenlei

Differential Revision: https://reviews.llvm.org/D95547


  Commit: 50f1aa1db5c59499b40abda1f565a3db1ebd7ee4
      https://github.com/llvm/llvm-project/commit/50f1aa1db5c59499b40abda1f565a3db1ebd7ee4
  Author: Ben Shi <powerman1st at 163.com>
  Date:   2021-01-28 (Thu, 28 Jan 2021)

  Changed paths:
    M llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
    M llvm/lib/Target/AVR/AVRISelLowering.cpp
    M llvm/lib/Target/AVR/AVRISelLowering.h
    M llvm/lib/Target/AVR/AVRInstrInfo.td
    M llvm/test/CodeGen/AVR/shift.ll

  Log Message:
  -----------
  [AVR] Optimize 16-bit int shift

Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D90092


Compare: https://github.com/llvm/llvm-project/compare/5c1cea6f4063...50f1aa1db5c5


More information about the All-commits mailing list