[all-commits] [llvm/llvm-project] a40e01: [RISCV] Rework fault first only load isel.

[Craig Topper via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: a40e01e4423ca13052f0fe0e5bc14abec1dd866e
      https://github.com/llvm/llvm-project/commit/a40e01e4423ca13052f0fe0e5bc14abec1dd866e
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-01-27 (Wed, 27 Jan 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

  Log Message:
  -----------
  [RISCV] Rework fault first only load isel.

-Remove the ISD opcode for READ_VL. Just emit the MachineSDNode directly.
-Move segmented fault first only load intrinsic handling completely to
 RISCVISelDAGToDAG.cpp and emit the ReadVL MachineSDNode there
 instead of lowering to ISD opcodes first.