[all-commits] [llvm/llvm-project] 2291bd: [AMDGPU] Update subtarget features for new target ...

Tue Jan 26 11:34:11 PST 2021

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 2291bd137d12cc4f806d80be93bb442246df4f0e
      https://github.com/llvm/llvm-project/commit/2291bd137d12cc4f806d80be93bb442246df4f0e
  Author: Austin Kerbow <Austin.Kerbow at amd.com>
  Date:   2021-01-26 (Tue, 26 Jan 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
    M llvm/lib/Target/AMDGPU/GCNSubtarget.h
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.d16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
    M llvm/test/CodeGen/AMDGPU/break-vmem-soft-clauses.mir
    M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
    M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
    M llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
    M llvm/test/CodeGen/AMDGPU/ctlz.ll
    M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
    M llvm/test/CodeGen/AMDGPU/ds_read2.ll
    M llvm/test/CodeGen/AMDGPU/ds_write2.ll
    M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
    M llvm/test/CodeGen/AMDGPU/elf-header-flags-sram-ecc.ll
    M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
    M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.private.ll
    M llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
    M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
    M llvm/test/CodeGen/AMDGPU/frem.ll
    M llvm/test/CodeGen/AMDGPU/fshl.ll
    M llvm/test/CodeGen/AMDGPU/fshr.ll
    M llvm/test/CodeGen/AMDGPU/function-returns.ll
    M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
    M llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
    M llvm/test/CodeGen/AMDGPU/hazard-in-bundle.mir
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props-v3.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
    M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
    M llvm/test/CodeGen/AMDGPU/idot2.ll
    M llvm/test/CodeGen/AMDGPU/idot4s.ll
    M llvm/test/CodeGen/AMDGPU/idot4u.ll
    M llvm/test/CodeGen/AMDGPU/idot8s.ll
    M llvm/test/CodeGen/AMDGPU/idot8u.ll
    M llvm/test/CodeGen/AMDGPU/immv216.ll
    M llvm/test/CodeGen/AMDGPU/indirect-call.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
    M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
    M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
    M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
    M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/max.i16.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
    M llvm/test/CodeGen/AMDGPU/min.ll
    M llvm/test/CodeGen/AMDGPU/nsa-reassign.ll
    M llvm/test/CodeGen/AMDGPU/nsa-vmem-hazard.mir
    M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
    M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
    M llvm/test/CodeGen/AMDGPU/reassoc-scalar.ll
    M llvm/test/CodeGen/AMDGPU/saddo.ll
    M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
    M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
    M llvm/test/CodeGen/AMDGPU/setcc-limit-load-shrink.ll
    M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/smrd.ll
    M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
    M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
    M llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir
    M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
    M llvm/test/CodeGen/AMDGPU/sram-ecc-default.ll
    A llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll
    A llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-disabled.ll
    A llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-enabled.ll
    M llvm/test/CodeGen/AMDGPU/store-local.128.ll
    M llvm/test/CodeGen/AMDGPU/store-local.96.ll
    M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
    A llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-any.ll
    A llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-disabled.ll
    A llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-enabled.ll
    M llvm/test/MC/AMDGPU/xnack-mask.s

  Log Message:
  -----------
  [AMDGPU] Update subtarget features for new target ID support

Support for XNACK and SRAMECC is not static on some GPUs. We must be able
to differentiate between different scenarios for these dynamic subtarget
features.

The possible settings are:

- Unsupported: The GPU has no support for XNACK/SRAMECC.
- Any: Preference is unspecified. Use conservative settings that can run anywhere.
- Off: Request support for XNACK/SRAMECC Off
- On: Request support for XNACK/SRAMECC On

GCNSubtarget will track the four options based on the following criteria. If
the subtarget does not support XNACK/SRAMECC we say the setting is
"Unsupported". If no subtarget features for XNACK/SRAMECC are requested we
must support "Any" mode. If the subtarget features XNACK/SRAMECC exist in the
feature string when initializing the subtarget, the settings are "On/Off".

The defaults are updated to be conservatively correct, meaning if no setting
for XNACK or SRAMECC is explicitly requested, defaults will be used which
generate code that can be run anywhere. This corresponds to the "Any" setting.

Differential Revision: https://reviews.llvm.org/D85882