[all-commits] [llvm/llvm-project] 07b60d: [InstCombine] add tests for min/max intrinsics wit...

RotateRight via All-commits all-commits at lists.llvm.org
Mon Jan 25 05:03:18 PST 2021


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 07b60d0060688dea121be36b46de859bafcec29b
      https://github.com/llvm/llvm-project/commit/07b60d0060688dea121be36b46de859bafcec29b
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-01-25 (Mon, 25 Jan 2021)

  Changed paths:
    M llvm/test/Transforms/InstCombine/minmax-intrinsics.ll

  Log Message:
  -----------
  [InstCombine] add tests for min/max intrinsics with extended values; NFC


  Commit: 09a136bcc6947128df86492d88f1733bdff745d1
      https://github.com/llvm/llvm-project/commit/09a136bcc6947128df86492d88f1733bdff745d1
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2021-01-25 (Mon, 25 Jan 2021)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/test/Transforms/InstCombine/minmax-intrinsics.ll

  Log Message:
  -----------
  [InstCombine] narrow min/max intrinsics with extended inputs

We can sink extends after min/max if they match and would
not change the sign-interpreted compare. The only combo
that doesn't work is zext+smin/smax because the zexts
could change a negative number into positive:
https://alive2.llvm.org/ce/z/D6sz6J

Sext+umax/umin works:

  define i32 @src(i8 %x, i8 %y) {
  %0:
    %sx = sext i8 %x to i32
    %sy = sext i8 %y to i32
    %m = umax i32 %sx, %sy
    ret i32 %m
  }
  =>
  define i32 @tgt(i8 %x, i8 %y) {
  %0:
    %m = umax i8 %x, %y
    %r = sext i8 %m to i32
    ret i32 %r
  }
  Transformation seems to be correct!


Compare: https://github.com/llvm/llvm-project/compare/b16fb1ffc3ce...09a136bcc694


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