[all-commits] [llvm/llvm-project] 60ebf6: [RISCV] Add test cases for missed opportunities to...

Craig Topper via All-commits all-commits at lists.llvm.org
Sun Jan 24 14:01:43 PST 2021


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 60ebf6408e965635deb94bcdead8ac9451bf0ee9
      https://github.com/llvm/llvm-project/commit/60ebf6408e965635deb94bcdead8ac9451bf0ee9
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-01-24 (Sun, 24 Jan 2021)

  Changed paths:
    M llvm/test/CodeGen/RISCV/double-convert.ll
    M llvm/test/CodeGen/RISCV/float-convert.ll
    M llvm/test/CodeGen/RISCV/half-convert.ll

  Log Message:
  -----------
  [RISCV] Add test cases for missed opportunities to use fcvt.*.w(u) instructions on RV64 when input is known to be extended from i8/i16.


  Commit: f22aa8f87931075834f973cebaa84c07ab1a26b1
      https://github.com/llvm/llvm-project/commit/f22aa8f87931075834f973cebaa84c07ab1a26b1
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-01-24 (Sun, 24 Jan 2021)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rv64m-exhaustive-w-insts.ll

  Log Message:
  -----------
  [RISCV] Add test cases for missed opportunities to use *W instructions for div/rem when inputs are sign/zero extended from i8/16 instead of i32.


  Commit: 12d0753aca22896fda2cf76781b0ee0524d55065
      https://github.com/llvm/llvm-project/commit/12d0753aca22896fda2cf76781b0ee0524d55065
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-01-24 (Sun, 24 Jan 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/test/CodeGen/RISCV/double-convert.ll
    M llvm/test/CodeGen/RISCV/float-convert.ll
    M llvm/test/CodeGen/RISCV/half-convert.ll
    M llvm/test/CodeGen/RISCV/rv64m-exhaustive-w-insts.ll

  Log Message:
  -----------
  [RISCV] Use bitsLE instead of strict == MVT::i32 in assertsexti32 and assertzexti32.

The patterns that use this really want to know if the operand has at
least 32 sign/zero bits.

This increases opportunities to use W instructions when the original
source used i8/i16. Not sure how much this matters for performance,
but it makes i8/i16 code more consistent with i32.


Compare: https://github.com/llvm/llvm-project/compare/e841bd5f3358...12d0753aca22


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