[all-commits] [llvm/llvm-project] 6e3604: [RISCV] Use v8-v23 as argument registers to confor...

Thu Jan 21 16:03:30 PST 2021

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 6e360460f14b4904f197b805f0f4659f4b960a16
      https://github.com/llvm/llvm-project/commit/6e360460f14b4904f197b805f0f4659f4b960a16
  Author: Hsiangkai Wang <kai.wang at sifive.com>
  Date:   2021-01-22 (Fri, 22 Jan 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoand-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoand-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamomax-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamomax-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamomin-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamomin-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamominu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamominu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoswap-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoswap-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoxor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vamoxor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vand-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vdiv-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vdivu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredsum-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfredsum-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfrsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vle-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vle-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmand-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmand-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmandnot-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmandnot-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll
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    M llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll
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    M llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll
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    M llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll
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    M llvm/test/CodeGen/RISCV/rvv/vmnor-rv32.ll
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    M llvm/test/CodeGen/RISCV/rvv/vmornot-rv32.ll
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    M llvm/test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll
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    M llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll
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    M llvm/test/CodeGen/RISCV/rvv/vmset-rv32.ll
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    M llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll
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    M llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll
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    M llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll
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    M llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmulh-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmxnor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmxnor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vmxor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vmxor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vnmsac-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vnmsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vpopc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vpopc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vredmax-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vredmin-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vredor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vredsum-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vredxor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vrem-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vremu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vremu-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vremu-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vrsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsaddu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsbc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vse-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vse-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vselect-int-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vselect-int-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsll-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsll-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsmul-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsplats-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsra-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsra-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsrl-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsrl-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsse-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsse-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsseg-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vssseg-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vssseg-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vssub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vssubu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vsuxei-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwadd-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwadd-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwaddu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwaddu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmul-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmul-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmulu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwmulu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsub-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsub-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsubu-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsubu-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vxor-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vxor-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv64.ll
    M llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll
    M llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll
    M llvm/test/CodeGen/RISCV/scalable-vector-struct.ll

  Log Message:
  -----------
  [RISCV] Use v8-v23 as argument registers to conform to the proposal.

The maximum LMUL is 8. We need 16 vector registers for two LMUL-8
arguments. The modification follows the proposal of psABI in
https://github.com/riscv/riscv-elf-psabi-doc/pull/171

Differential Revision: https://reviews.llvm.org/D95134