[all-commits] [llvm/llvm-project] 560d7e: [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and ...

[Daniil Fukalov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 560d7e04113bf43ed0928a1fbdf328818194141e
      https://github.com/llvm/llvm-project/commit/560d7e04113bf43ed0928a1fbdf328818194141e
  Author: dfukalov <daniil.fukalov at amd.com>
  Date:   2021-01-20 (Wed, 20 Jan 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUPropagateAttributes.cpp
    M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
    M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
    M llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
    M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
    M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
    M llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp
    M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
    M llvm/lib/Target/AMDGPU/GCNRegPressure.h
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
    A llvm/lib/Target/AMDGPU/GCNSubtarget.h
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
    M llvm/lib/Target/AMDGPU/R600AsmPrinter.cpp
    M llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp
    M llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp
    M llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp
    M llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
    M llvm/lib/Target/AMDGPU/R600FrameLowering.cpp
    M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
    M llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
    M llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp
    M llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
    M llvm/lib/Target/AMDGPU/R600Packetizer.cpp
    M llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp
    A llvm/lib/Target/AMDGPU/R600Subtarget.h
    M llvm/lib/Target/AMDGPU/SIAddIMGInit.cpp
    M llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
    M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
    M llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp
    M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
    M llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp
    M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp
    M llvm/lib/Target/AMDGPU/SIInsertSkips.cpp
    M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
    M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
    M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
    M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
    M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
    M llvm/lib/Target/AMDGPU/SIModeRegister.cpp
    M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
    M llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
    M llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
    M llvm/lib/Target/AMDGPU/SIPostRABundler.cpp
    M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
    M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
    M llvm/lib/Target/AMDGPU/SIRemoveShortExecBranches.cpp
    M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
    M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp

  Log Message:
  -----------
  [NFC][AMDGPU] Split AMDGPUSubtarget.h to R600 and GCN subtargets

... to reduce headers dependency.

Reviewed By: rampitec, arsenm

Differential Revision: https://reviews.llvm.org/D95036