[all-commits] [llvm/llvm-project] b11b6a: [RISCV] Add way to mark CompressPats that should o...

[Craig Topper via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: b11b6ab3e09464e88e57b69ff4a8fc8e1c00cc5b
      https://github.com/llvm/llvm-project/commit/b11b6ab3e09464e88e57b69ff4a8fc8e1c00cc5b
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-01-20 (Wed, 20 Jan 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoC.td
    M llvm/test/MC/RISCV/compress-rv32i.s
    M llvm/test/MC/RISCV/option-rvc.s
    M llvm/test/TableGen/AsmPredicateCombiningRISCV.td
    M llvm/utils/TableGen/RISCVCompressInstEmitter.cpp

  Log Message:
  -----------
  [RISCV] Add way to mark CompressPats that should only be used for compressing.

There can be muliple patterns that map to the same compressed
instruction. Reversing those leads to multiple ways to uncompress
an instruction, but its not easily controllable which one will
be chosen by the tablegen backend.

This patch adds a flag to mark patterns that should only be used
for compressing. This allows us to leave one canonical pattern
for uncompressing.

The obvious benefit of this is getting c.mv to uncompress to
the addi patern that is aliased to the mv pseudoinstruction. For
the add/and/or/xor/li patterns it just removes some unreachable
code from the generated code.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D94894