[all-commits] [llvm/llvm-project] 4ab704: [AMDGPU][MC] Add tfe disassembler support MIMG opc...

[petar-avramovic via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 4ab704d62820396af5bd4a4322a5cbc2700a7ec3
      https://github.com/llvm/llvm-project/commit/4ab704d62820396af5bd4a4322a5cbc2700a7ec3
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2021-01-20 (Wed, 20 Jan 2021)

  Changed paths:
    M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
    M llvm/lib/Target/AMDGPU/MIMGInstructions.td
    M llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt
    M llvm/test/MC/Disassembler/AMDGPU/mimg_vi.txt

  Log Message:
  -----------
  [AMDGPU][MC] Add tfe disassembler support MIMG opcodes

With tfe on there can be a vgpr write to vdata+1.
Add tablegen support for 5 register vdata store.
This is required for 4 register vdata store with tfe.

Differential Revision: https://reviews.llvm.org/D94960