[all-commits] [llvm/llvm-project] 9c6a00: [RISCV] Add ISel patterns for scalable mask exts &...

[Fraser Cormack via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 9c6a00fe99c4bbe329dd1933515f1a1a430fd5d7
      https://github.com/llvm/llvm-project/commit/9c6a00fe99c4bbe329dd1933515f1a1a430fd5d7
  Author: Fraser Cormack <fraser at codeplay.com>
  Date:   2021-01-19 (Tue, 19 Jan 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    A llvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll
    A llvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll

  Log Message:
  -----------
  [RISCV] Add ISel patterns for scalable mask exts & truncs

Original patch by @rogfer01.

This patch adds support for sign-, zero-, and any-extension from
scalable mask vector types to integer vector types, as well as
truncation in the opposite direction.

Authored-by: Roger Ferrer Ibanez <rofirrim at gmail.com>
Co-Authored-by: Fraser Cormack <fraser at codeplay.com>

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D94590