[all-commits] [llvm/llvm-project] 909d6c: [PowerPC] Fix the check for the instruction using ...

[Victor Huang via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 909d6c86eae32ef350ac35ba8564ed728544ac63
      https://github.com/llvm/llvm-project/commit/909d6c86eae32ef350ac35ba8564ed728544ac63
  Author: Victor Huang <wei.huang at ibm.com>
  Date:   2021-01-19 (Tue, 19 Jan 2021)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
    A llvm/test/CodeGen/PowerPC/non-debug-mi-search-frspxsrsp.ll

  Log Message:
  -----------
  [PowerPC] Fix the check for the instruction using FRSP/XSRSP output register

When performing peephole optimization to simplify the code, after removing
passed FPSP/XSRSP instruction we will set any uses of that FRSP/XSRSP to the
source of the FRSP/XSRSP.

We are finding the machine instruction using virtual register holding FRSP/XSRSP
results by searching all following instructions and encountering an issue
that the first use of the virtual register is a debug MI causing:
1. virtual register in the debug MI removed unexpectedly.
2. virtual register used in non-debug MI not replaced with the source of
  FRSP/XSRSP. which stays in a undef status.

This patch fix the issue by only searching non-debug machine instruction using
virtual register holding FRSP/XSRSP results when the vr only has one non debug
usage.

Differential Revisien: https://reviews.llvm.org/D94711
Reviewed by: nemanjai