[all-commits] [llvm/llvm-project] ac603c: [RISCV] Add scalable vector truncate patterns
Fraser Cormack via All-commits
all-commits at lists.llvm.org
Mon Jan 18 02:29:25 PST 2021
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: ac603c8d3850ed0c715c421d79bb5cb014bb21de
https://github.com/llvm/llvm-project/commit/ac603c8d3850ed0c715c421d79bb5cb014bb21de
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2021-01-18 (Mon, 18 Jan 2021)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
A llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv32.ll
A llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv64.ll
Log Message:
-----------
[RISCV] Add scalable vector truncate patterns
Original patch by @rogfer01.
This patch supports vector truncates, which on RVV must be done in a
series of instructions truncating by one power-of-two at a time. This is
done through custom-lowering and a custom node to avoid LLVM
re-combining the split TRUNCATE nodes.
Authored-by: Roger Ferrer Ibanez <rofirrim at gmail.com>
Co-Authored-by: Fraser Cormack <fraser at codeplay.com>
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D94796
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