[all-commits] [llvm/llvm-project] 131ce8: [RISCV] Clear isCodeGenOnly flag on VMSGE(U) pseud...

[Craig Topper via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 131ce834e4bbe443a0da0e0ce00c8d0fa4412458
      https://github.com/llvm/llvm-project/commit/131ce834e4bbe443a0da0e0ce00c8d0fa4412458
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2021-01-10 (Sun, 10 Jan 2021)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoV.td

  Log Message:
  -----------
  [RISCV] Clear isCodeGenOnly flag on VMSGE(U) pseudo instructions. Remove InstAliases that duplicate the asm strings in the pseudos.

The Pseudo class sets isCodeGenOnly=1 which causes the asm strings
in the pseudos to be ignored. I think this is why the aliases are
needed at all.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D94024