[all-commits] [llvm/llvm-project] 78d8a8: [AArch64] Handle any extend whilst lowering mull

[David Green via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 78d8a821e23e42d13dcbb3467747e480fb889b8a
      https://github.com/llvm/llvm-project/commit/78d8a821e23e42d13dcbb3467747e480fb889b8a
  Author: David Green <david.green at arm.com>
  Date:   2021-01-06 (Wed, 06 Jan 2021)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/aarch64-smull.ll
    M llvm/test/CodeGen/AArch64/lowerMUL-newload.ll

  Log Message:
  -----------
  [AArch64] Handle any extend whilst lowering mull

Demanded bits may turn a sext or zext into an anyext if the top bits are
not needed. This currently prevents the lowering to instructions like
mull, addl and addw. This patch fixes the mull generation by keeping it
simple and treating them like zextends.

Differential Revision: https://reviews.llvm.org/D93832