[all-commits] [llvm/llvm-project] a9f5e4: [AArch64] Use faddp to implement fadd reductions.

[sdesmalen-arm via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: a9f5e4375b36e5316b8d6f9731be6bfa5a70e276
      https://github.com/llvm/llvm-project/commit/a9f5e4375b36e5316b8d6f9731be6bfa5a70e276
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2021-01-06 (Wed, 06 Jan 2021)

  Changed paths:
    M llvm/include/llvm/Target/TargetSelectionDAG.td
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/vecreduce-fadd-legalization.ll
    M llvm/test/CodeGen/AArch64/vecreduce-fadd.ll

  Log Message:
  -----------
  [AArch64] Use faddp to implement fadd reductions.

Custom-expand legal VECREDUCE_FADD SDNodes
to benefit from pair-wise faddp instructions.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D59259