[all-commits] [llvm/llvm-project] d68458: [GlobalISel] Base implementation for sret demotion.

[Christudasan Devadasan via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: d68458bd56d9d55b05fca5447891aa8752d70509
      https://github.com/llvm/llvm-project/commit/d68458bd56d9d55b05fca5447891aa8752d70509
  Author: Christudasan Devadasan <Christudasan.Devadasan at amd.com>
  Date:   2021-01-06 (Wed, 06 Jan 2021)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
    M llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.h
    M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h
    M llvm/lib/Target/ARM/ARMCallLowering.cpp
    M llvm/lib/Target/ARM/ARMCallLowering.h
    M llvm/lib/Target/Mips/MipsCallLowering.cpp
    M llvm/lib/Target/Mips/MipsCallLowering.h
    M llvm/lib/Target/PowerPC/GISel/PPCCallLowering.cpp
    M llvm/lib/Target/PowerPC/GISel/PPCCallLowering.h
    M llvm/lib/Target/RISCV/RISCVCallLowering.cpp
    M llvm/lib/Target/RISCV/RISCVCallLowering.h
    M llvm/lib/Target/X86/X86CallLowering.cpp
    M llvm/lib/Target/X86/X86CallLowering.h
    M llvm/tools/llvm-exegesis/lib/Assembler.cpp

  Log Message:
  -----------
  [GlobalISel] Base implementation for sret demotion.

If the return values can't be lowered to registers
SelectionDAG performs the sret demotion. This patch
contains the basic implementation for the same in
the GlobalISel pipeline.

Furthermore, targets should bring relevant changes
during lowerFormalArguments, lowerReturn and
lowerCall to make use of this feature.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D92953