[all-commits] [llvm/llvm-project] f26bc0: [RegisterClassInfo] Return non-zero for RC without...
jsji via All-commits
all-commits at lists.llvm.org
Tue Jan 5 08:24:02 PST 2021
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: f26bc0ddd508edad7e3838850dfcb6b960d6e681
https://github.com/llvm/llvm-project/commit/f26bc0ddd508edad7e3838850dfcb6b960d6e681
Author: Jinsong Ji <jji at us.ibm.com>
Date: 2021-01-05 (Tue, 05 Jan 2021)
Changed paths:
M llvm/lib/CodeGen/RegisterClassInfo.cpp
M llvm/test/CodeGen/PowerPC/compute-regpressure.ll
Log Message:
-----------
[RegisterClassInfo] Return non-zero for RC without allocatable reg
In some case, the RC may have 0 allocatable reg.
eg: VRSAVERC in PowerPC, which has only 1 reg, but it is also reserved.
The curreent implementation will keep calling the computePSetLimit because
getRegPressureSetLimit assume computePSetLimit will return a non-zero value.
The fix simply early return the value from TableGen for such special case.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D92907
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