[all-commits] [llvm/llvm-project] 3d5b18: [clang][AArch64][SVE] Avoid going through memory f...

[Joe Ellis via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 3d5b18a3fdf47ae2286642131e4a92968dd01c2a
      https://github.com/llvm/llvm-project/commit/3d5b18a3fdf47ae2286642131e4a92968dd01c2a
  Author: Joe Ellis <joe.ellis at arm.com>
  Date:   2021-01-05 (Tue, 05 Jan 2021)

  Changed paths:
    M clang/lib/CodeGen/CGCall.cpp
    M clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.c
    M clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp
    M clang/test/CodeGen/attr-arm-sve-vector-bits-call.c
    M clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c

  Log Message:
  -----------
  [clang][AArch64][SVE] Avoid going through memory for coerced VLST arguments

VLST arguments are coerced to VLATs at the function boundary for
consistency with the VLAT ABI. They are then bitcast back to VLSTs in
the function prolog. Previously, this conversion is done through memory.
With the introduction of the llvm.vector.{insert,extract} intrinsic, we
can avoid going through memory here.

Depends on D92761

Differential Revision: https://reviews.llvm.org/D92762