[all-commits] [llvm/llvm-project] 901cc9: [ARM] Extend lowering for i64 reductions

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 901cc9b6f30f120f2fbdc01f9eec3708c512186b
      https://github.com/llvm/llvm-project/commit/901cc9b6f30f120f2fbdc01f9eec3708c512186b
  Author: David Green <david.green at arm.com>
  Date:   2021-01-04 (Mon, 04 Jan 2021)

  Changed paths:
    M llvm/lib/Target/ARM/ARMISelLowering.cpp
    M llvm/test/CodeGen/Thumb2/mve-vecreduce-add.ll
    M llvm/test/CodeGen/Thumb2/mve-vecreduce-addpred.ll
    M llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll
    M llvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll

  Log Message:
  -----------
  [ARM] Extend lowering for i64 reductions

The lowering of a <4 x i16> or <4 x i8> vecreduce.add into an i64 would
previously be expanded, due to the i64 not being legal. This patch
adjusts our reduction matchers, making it produce a VADDLV(sext A to
v4i32) instead.

Differential Revision: https://reviews.llvm.org/D93622