[all-commits] [llvm/llvm-project] 630187: [RISCV] Add intrinsics for vfwmacc, vfwnmacc, vfwm...

[ShihPo Hung via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6301871d06d6ea0195b5ea3b53288dcfe229557a
      https://github.com/llvm/llvm-project/commit/6301871d06d6ea0195b5ea3b53288dcfe229557a
  Author: ShihPo Hung <shihpo.hung at sifive.com>
  Date:   2020-12-23 (Wed, 23 Dec 2020)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    A llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll
    A llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll
    A llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll
    A llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll
    A llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll
    A llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll

  Log Message:
  -----------
  [RISCV] Add intrinsics for vfwmacc, vfwnmacc, vfwmsac, vfwnmsac instructions

This patch defines vfwmacc, vfwnmacc, vfwmsc, vfwnmsac intrinsics
and lower to V instructions.
We work with @rogfer01 from BSC to come out this patch.

Authored-by: Roger Ferrer Ibanez <rofirrim at gmail.com>
Co-Authored-by: ShihPo Hung <shihpo.hung at sifive.com>

Differential Revision: https://reviews.llvm.org/D93693