[all-commits] [llvm/llvm-project] e2303a: [FastRA] Fix handling of bundled MIs

[pdhaliwal-amd via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e2303a448e2fcc1d96d66e9ee9f0cfc009b69a3f
      https://github.com/llvm/llvm-project/commit/e2303a448e2fcc1d96d66e9ee9f0cfc009b69a3f
  Author: Pushpinder Singh <Pushpinder.Singh at amd.com>
  Date:   2020-12-21 (Mon, 21 Dec 2020)

  Changed paths:
    M llvm/lib/CodeGen/RegAllocFast.cpp
    A llvm/test/CodeGen/AMDGPU/fast-regalloc-bundles.mir
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-fastregalloc.ll

  Log Message:
  -----------
  [FastRA] Fix handling of bundled MIs

Fast register allocator skips bundled MIs, as the main assignment
loop uses MachineBasicBlock::iterator (= MachineInstrBundleIterator)
This was causing SIInsertWaitcnts to crash which expects all
instructions to have registers assigned.

This patch makes sure to set everything inside bundle to the same
assignments done on BUNDLE header.

Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D90369