[all-commits] [llvm/llvm-project] 564066: [PowerPC] add has side effect for SAT bit clobber ...

[Chen Zheng via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 564066524ad0872eb8b7cadfaf7c94274f3d5951
      https://github.com/llvm/llvm-project/commit/564066524ad0872eb8b7cadfaf7c94274f3d5951
  Author: Chen Zheng <czhengsz at cn.ibm.com>
  Date:   2020-12-20 (Sun, 20 Dec 2020)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsPowerPC.td
    M llvm/lib/Target/PowerPC/PPCInstrAltivec.td
    A llvm/test/CodeGen/PowerPC/sat-register-clobber.ll

  Log Message:
  -----------
  [PowerPC] add has side effect for SAT bit clobber intrinsics/instructions

This patch does two things:
1: fix the typo that intrinsic mfvscr should be with no readmem property
2: since VSCR is not modeled yet, add has side effect for SAT bit clobber
   intrinsics/instructions.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D90807