[all-commits] [llvm/llvm-project] 0cbcee: [TableGen][ARM][X86] Detect combining IntrReadMem ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0cbceed27c491ebd185e1f53bd0f43ce655efceb
      https://github.com/llvm/llvm-project/commit/0cbceed27c491ebd185e1f53bd0f43ce655efceb
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2020-12-19 (Sat, 19 Dec 2020)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsARM.td
    M llvm/include/llvm/IR/IntrinsicsX86.td
    M llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/Barcelona/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/BdVer2/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/BdVer2/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/Broadwell/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/Broadwell/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/stmxcsr-ldmxcsr.s
    M llvm/test/tools/llvm-mca/X86/Generic/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/Generic/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/Haswell/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/Haswell/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/Haswell/stmxcsr-ldmxcsr.s
    M llvm/test/tools/llvm-mca/X86/SLM/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/SandyBridge/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/SandyBridge/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/Znver1/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/Znver1/resources-sse1.s
    M llvm/test/tools/llvm-mca/X86/Znver2/resources-avx1.s
    M llvm/test/tools/llvm-mca/X86/Znver2/resources-sse1.s
    M llvm/utils/TableGen/CodeGenTarget.cpp

  Log Message:
  -----------
  [TableGen][ARM][X86] Detect combining IntrReadMem and IntrWriteMem.

These properties aren't additive. They are closer to ReadOnly and
WriteOnly. The default is ReadWrite. ReadMem cancels the write property and
WriteMem cancels the read property. Combining them leaves neither.

This patch checks that when we process WriteMem, the Mod flag is
still set. And for ReadMem we check that the Ref flag set still set.

I've updated 2 target intrinsics that were combining these properties.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D93571