[all-commits] [llvm/llvm-project] 46a40c: [RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f

[Craig Topper via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 46a40c4bc10671ebddb45fabd1a3b0b419a58109
      https://github.com/llvm/llvm-project/commit/46a40c4bc10671ebddb45fabd1a3b0b419a58109
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2020-12-18 (Fri, 18 Dec 2020)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

  Log Message:
  -----------
  [RISCV] Add intrinsics for vfmv.f.s and vfmv.s.f

Similar to D93365, but for floating point. No need for special ISD opcodes
though. We can directly isel these from intrinsics. I had to use anyfloat_ty
instead of anyvector_ty in the intrinsics to make LLVMVectorElementType not
crash when imported into the -gen-dag-isel tablegen backend.

Differential Revision: https://reviews.llvm.org/D93426