[all-commits] [llvm/llvm-project] 477b65: [PowerPC] Select the D-Form load if we know its of...

[QingShan Zhang via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 477b6505fa1d49339c81fbbda937dc8bb5e53cfd
      https://github.com/llvm/llvm-project/commit/477b6505fa1d49339c81fbbda937dc8bb5e53cfd
  Author: QingShan Zhang <qshanz at cn.ibm.com>
  Date:   2020-12-18 (Fri, 18 Dec 2020)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCInstr64Bit.td
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    M llvm/test/CodeGen/PowerPC/ldst-align.ll
    M llvm/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
    M llvm/test/CodeGen/PowerPC/memcmp-mergeexpand.ll
    M llvm/test/CodeGen/PowerPC/pr45186.ll
    M llvm/test/CodeGen/PowerPC/store-combine.ll
    M llvm/test/CodeGen/PowerPC/unal4-std.ll
    M llvm/test/CodeGen/PowerPC/unaligned.ll

  Log Message:
  -----------
  [PowerPC] Select the D-Form load if we know its offset meets the requirement

The LD/STD likewise instruction are selected only when the alignment in
the load/store >= 4 to deal with the case that the offset might not be
known(i.e. relocations). That means we have to select the X-Form load
for %0 = load i64, i64* %arrayidx, align 2 In fact, we can still select
the D-Form load if the offset is known. So, we only query the load/store
alignment when we don't know if the offset is a multiple of 4.

Reviewed By: jji, Nemanjai

Differential Revision: https://reviews.llvm.org/D93099