[all-commits] [llvm/llvm-project] 553808: [X86] Rename reduction combiners to make it cleare...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 553808d45620e12dad7dcab553d4444b74e6010d
      https://github.com/llvm/llvm-project/commit/553808d45620e12dad7dcab553d4444b74e6010d
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-12-16 (Wed, 16 Dec 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp

  Log Message:
  -----------
  [X86] Rename reduction combiners to make it clearer whats happening. NFCI.

Since these are all working on reduction patterns, actually use that term in the function name to make them easier to search for.

At some point we're likely to start working with the ISD::VECREDUCE_* opcodes directly in the x86 backend, but that is still some way off.


  Commit: e5039aad45740a3017d774673867eccbbe6b0ce0
      https://github.com/llvm/llvm-project/commit/e5039aad45740a3017d774673867eccbbe6b0ce0
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-12-16 (Wed, 16 Dec 2020)

  Changed paths:
    M llvm/test/CodeGen/X86/extract-bits.ll
    M llvm/test/CodeGen/X86/extract-lowbits.ll

  Log Message:
  -----------
  [X86] Regenerate bit extraction tests, cleaning up check-prefixes.

As noticed on D92965, we needed to simplify the prefixes to ensure all RUNs were properly covered.

We should never have a target with BMI2 without BMI1, so use that as the 'BMI level' and then check with/without TBM (all TBM targets have at least BMI1).


Compare: https://github.com/llvm/llvm-project/compare/66ee0d3d84a6...e5039aad4574