[all-commits] [llvm/llvm-project] e0d43a: [RISCV][NFC] Define scalable vectors for half types.

[Kai Wang via All-commits]

  Branch: refs/heads/kai-upstream
  Home:   https://github.com/llvm/llvm-project
  Commit: e0d43a3b37a0d14c1caf3a79a4ad57a7a75fc3ae
      https://github.com/llvm/llvm-project/commit/e0d43a3b37a0d14c1caf3a79a4ad57a7a75fc3ae
  Author: Hsiangkai Wang <kai.wang at sifive.com>
  Date:   2020-12-15 (Tue, 15 Dec 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.td

  Log Message:
  -----------
  [RISCV][NFC] Define scalable vectors for half types.

This is a preperation work for vfadd intrinsics.


  Commit: cbbdcfc47c86ddafe4ebad49f93dd37b513db0ac
      https://github.com/llvm/llvm-project/commit/cbbdcfc47c86ddafe4ebad49f93dd37b513db0ac
  Author: Hsiangkai Wang <kai.wang at sifive.com>
  Date:   2020-12-15 (Tue, 15 Dec 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCV.td
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
    M llvm/lib/Target/RISCV/RISCVSchedRocket.td
    M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
    M llvm/test/MC/RISCV/rvv/convert.s
    M llvm/test/MC/RISCV/rvv/fadd.s
    M llvm/test/MC/RISCV/rvv/fcompare.s
    M llvm/test/MC/RISCV/rvv/fdiv.s
    M llvm/test/MC/RISCV/rvv/fmacc.s
    M llvm/test/MC/RISCV/rvv/fminmax.s
    M llvm/test/MC/RISCV/rvv/fmul.s
    M llvm/test/MC/RISCV/rvv/fmv.s
    M llvm/test/MC/RISCV/rvv/fothers.s
    M llvm/test/MC/RISCV/rvv/freduction.s
    M llvm/test/MC/RISCV/rvv/fsub.s
    M llvm/test/MC/RISCV/rvv/sign-injection.s

  Log Message:
  -----------
  [RISCV] V does not imply F.

If users want to use vector floating point instructions, they need to
specify 'F' extension additionally.


Compare: https://github.com/llvm/llvm-project/compare/e0d43a3b37a0%5E...cbbdcfc47c86