[all-commits] [llvm/llvm-project] 0c7cce: [AMDGPU] Resolve issues when picking between ds_re...

[Mirko Brkušanin via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 0c7cce54eba3249489530040f41103dd8e0049f7
      https://github.com/llvm/llvm-project/commit/0c7cce54eba3249489530040f41103dd8e0049f7
  Author: Mirko Brkusanin <Mirko.Brkusanin at amd.com>
  Date:   2020-12-10 (Thu, 10 Dec 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.td
    M llvm/lib/Target/AMDGPU/DSInstructions.td
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local-128.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
    M llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
    M llvm/test/CodeGen/AMDGPU/load-local.128.ll
    M llvm/test/CodeGen/AMDGPU/store-local.128.ll

  Log Message:
  -----------
  [AMDGPU] Resolve issues when picking between ds_read/write and ds_read2/write2

Both ds_read_b128 and ds_read2_b64 are valid for 128bit 16-byte aligned
loads but the one that will be selected is determined either by the order in
tablegen or by the AddedComplexity attribute. Currently ds_read_b128 has
priority.

While ds_read2_b64 has lower alignment requirements, we cannot always
restrict ds_read_b128 to 16-byte alignment because of unaligned-access-mode
option. This was causing ds_read_b128 to be selected for 8-byte aligned
loads regardles of chosen access mode.

To resolve this we use two patterns for selecting ds_read_b128. One
requires alignment of 16-byte and the other requires
unaligned-access-mode option.

Same goes for ds_write2_b64 and ds_write_b128.

Differential Revision: https://reviews.llvm.org/D92767