[all-commits] [llvm/llvm-project] f80b29: [X86] AMX programming model.

[Luo, Yuanke via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f80b29878b0448efb306b9c93c49e5deb9ba2738
      https://github.com/llvm/llvm-project/commit/f80b29878b0448efb306b9c93c49e5deb9ba2738
  Author: Luo, Yuanke <yuanke.luo at intel.com>
  Date:   2020-12-10 (Thu, 10 Dec 2020)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsX86_64.def
    M clang/lib/Headers/amxintrin.h
    A clang/test/CodeGen/X86/amx_api.c
    M llvm/include/llvm/CodeGen/LiveIntervalUnion.h
    M llvm/include/llvm/CodeGen/LiveRegMatrix.h
    M llvm/include/llvm/CodeGen/Passes.h
    A llvm/include/llvm/CodeGen/TileShapeInfo.h
    M llvm/include/llvm/CodeGen/VirtRegMap.h
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/include/llvm/IR/IntrinsicsX86.td
    M llvm/lib/CodeGen/InlineSpiller.cpp
    M llvm/lib/CodeGen/LiveIntervalUnion.cpp
    M llvm/lib/CodeGen/LiveRegMatrix.cpp
    M llvm/lib/CodeGen/VirtRegMap.cpp
    M llvm/lib/Target/X86/CMakeLists.txt
    M llvm/lib/Target/X86/X86.h
    M llvm/lib/Target/X86/X86ExpandPseudo.cpp
    M llvm/lib/Target/X86/X86FrameLowering.cpp
    M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86InstrAMX.td
    M llvm/lib/Target/X86/X86InstrInfo.cpp
    A llvm/lib/Target/X86/X86LowerAMXType.cpp
    A llvm/lib/Target/X86/X86PreTileConfig.cpp
    M llvm/lib/Target/X86/X86RegisterInfo.cpp
    M llvm/lib/Target/X86/X86RegisterInfo.h
    M llvm/lib/Target/X86/X86RegisterInfo.td
    M llvm/lib/Target/X86/X86Subtarget.h
    M llvm/lib/Target/X86/X86TargetMachine.cpp
    A llvm/lib/Target/X86/X86TileConfig.cpp
    A llvm/test/CodeGen/X86/AMX/amx-across-func.ll
    A llvm/test/CodeGen/X86/AMX/amx-config.ll
    A llvm/test/CodeGen/X86/AMX/amx-spill.ll
    A llvm/test/CodeGen/X86/AMX/amx-type.ll
    M llvm/test/CodeGen/X86/O0-pipeline.ll
    M llvm/test/CodeGen/X86/ipra-reg-usage.ll
    M llvm/test/CodeGen/X86/opt-pipeline.ll
    M llvm/test/CodeGen/X86/statepoint-fixup-invoke.mir
    M llvm/test/CodeGen/X86/statepoint-fixup-shared-ehpad.mir

  Log Message:
  -----------
  [X86] AMX programming model.
 This patch implements amx programming model that discussed in llvm-dev
 (http://lists.llvm.org/pipermail/llvm-dev/2020-August/144302.html).
 Thank Hal for the good suggestion in the RA. The fast RA is not in the patch yet.
 This patch implemeted 7 components.

1. The c interface to end user.
2. The AMX intrinsics in LLVM IR.
3. Transform load/store <256 x i32> to AMX intrinsics or split the
   type into two <128 x i32>.
4. The Lowering from AMX intrinsics to AMX pseudo instruction.
5. Insert psuedo ldtilecfg and build the def-use between ldtilecfg to amx
   intruction.
6. The register allocation for tile register.
7. Morph AMX pseudo instruction to AMX real instruction.

Change-Id: I935e1080916ffcb72af54c2c83faa8b2e97d5cb0

Differential Revision: https://reviews.llvm.org/D87981