[all-commits] [llvm/llvm-project] b2ef26: [VectorCombine] allow peeking through an extractel...

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  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: b2ef264096c045cf7147320a8bcdf8ec725ec534
      https://github.com/llvm/llvm-project/commit/b2ef264096c045cf7147320a8bcdf8ec725ec534
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2020-12-09 (Wed, 09 Dec 2020)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
    M llvm/test/Transforms/VectorCombine/X86/load.ll

  Log Message:
  -----------
  [VectorCombine] allow peeking through an extractelt when creating a vector load

This is an enhancement to load vectorization that is motivated by
a pattern in https://llvm.org/PR16739.
Unfortunately, it's still not enough to make a difference there.
We will have to handle multi-use cases in some better way to avoid
creating multiple overlapping loads.

Differential Revision: https://reviews.llvm.org/D92858